Vlsi Project Center in chennai

IEEE 2016 - 2017 VLSI Projects
31.High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator





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32.Frequency-Boost Jitter Reduction forVoltage-Controlled Ring Oscillators





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33.Low-Energy Power-ON-Reset Circuit for Dual Supply SRAM





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34.Low-Power Variation-Tolerant Nonvolatile Lookup Table Design





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35.A Low-Power Robust Easily CascadedPentaMTJ-Based Combinational and Sequential Circuits





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36.A 0.13.5-GHz Duty-Cycle Measurement andCorrection Technique in 130-nm CMOS





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37.Full-Swing Local Bitline SRAM ArchitectureBased on the 22-nm FinFET Technology for Low-Voltage Operation





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38.A Robust Energy/Area-Efficient Forwarded-ClockReceiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects





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39.OTA-Based Logarithmic Circuit for ArbitraryInput Signal and Its Application





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40.A Single-Ended With Dynamic Feedback Control8T Subthreshold SRAM Cell





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41.Graph-Based Transistor Network GenerationMethod for Supergate Design





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42.Implementing Minimum-Energy-Point SystemsWith Adaptive Logic





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43.A 0.52/1 V Fast Lock-in ADPLL for Supporting DynamicVoltage and Frequency Scaling





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